Synthesis for Circuit Reliability

Dedication My thanks go, as always, to my maternal grandparents, to whom this dissertation is dedicated. I am indebted to my maternal grandparents for standing beside me all these years and constantly motivating me in my efforts. I wouldn't have been what I am, without their help. And My thanks go to my supervising professor, Nur A. Touba. v Acknowledgements I wish to thank my advisor, Professor Nur A. Touba for his continued guidance and encouragement. His research philosophy of maintaining a balance between pure theoretical and practical aspects of research has influenced me a lot. Finally, my thanks go to the other committee members, Prof. For modern logic circuits, circuit reliability is an important design consideration. Ionizing radiation from high-energy neutrons and alpha particles can cause a single-event upset (SEU) that may cause a bit flip in some latch or memory element thereby altering the state of the system resulting in a soft error. As process technology scales well below 100 nanometers, the higher operating frequencies, lower voltage levels, and smaller noise margins make integrated circuits increasingly susceptible to SEUs resulting in a dramatic increase in soft errors. In this dissertation, a non-intrusive technique is presented to detect soft errors in multilevel combinational logic circuit with minimal overhead. Another low cost error correcting code based technique is presented to detect and correct the most likely soft errors in memory. This technique is then extended to design a low cost unequal error protection code which can protect data residing in a router buffer effectively. The dissertation also contains a fast algorithm to accurately estimate signal probabilities of circuit lines. This algorithm can be used to estimate soft error rates in a logic circuit. Finally, the vii dissertation also includes a low cost test data compression technique to reduce the deterministic test data to be stored on tester during off-line testing of a circuit. Circuit reliability has become an important design consideration. When ionizing radiation from high-energy neutrons and alpha particles strike a sensitive region in a semiconductor device, they generate a dense track of electron-hole pairs that may be collected by a p-n junction resulting in a very short duration pulse of current causing a single-event upset (SEU) in the signal value. An SEU may cause a bit flip in some latch or memory element thereby altering the state of the system resulting in a soft error. As process technology …